Prospects and Problems on Open, Secure Hardware Development


ABOUT THIS PAPER PUBLICATION

I'm sitting on a lot of designs. There are actually many open hardware models that can be turned into a functional computer on FPGA or ASIC's with *relatively* little cost. The problem is they aren't secure chips. There are routes to producing a secure system that's open or vetted. My shortcut is to basically throw existing work together into one compute processor, one I/O processor, a memory bus I.P., and a reference board that's easy to expand with functionality. These can be reused for about any major component in a larger system or network. The problem is that even one of I.P.'s can cost a considerable amount of money to prototype, verify, test on ASIC batch, and put into production. Doing all in parallel would be necessary to smooth integration and it would cost even more.

Download Paper (TXT)
PGP Signature


Publication Info
Written On: 17 Jul 2014
Published On: 17 Jul 2014
Author: Nick P


CONTACT